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Introduction
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Fundamentals of Logic Design
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Note: This topic is common in many subjects like C, computer architecture etc. hence we are covering it in depth for your better understandung
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Concept behind formation of Number System | C Programming in Hindi | Basic to advanced
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Decimal To Binary-Octa-Hexa
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Live Lecture: Number System Conversion
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Quiz - Number System
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Boolean Algebra
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Introduction To Digital Gates
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Live Lecture: Boolean Law's,De-Morgan’s theorem
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Live Lecture: Concept of Maxterm and Minterm Part 1
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Live Lecture: Concept of Maxterm and Minterm Part 2
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Live Lecture: Dual of a function and its properties
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Live Lecture: Properties of XOR & XNOR
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Live Lecture: Numerical Solving
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Live Lecture: Concept of Functionally Complete Boolean Function
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Live Lecture: Implementation of Boolean Functions using NAND and NOR
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Assignment 1
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Live Lecture: Functionally Complete Boolean Function
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Functionally Complete Boolean Functions
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Boolean Algebra Hand Written Notes (Jash)
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Concept of K MAP : PART 1
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Concept of K MAP : PART 2
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K MAP EXAMPLES
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K MAP
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Advance Lecture : K MAP
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Boolean Algebra and K MAP : Test 1
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Design of Adder & Subtractor : Half and Full Adder
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Design of Adder & Subtractor : Part 2
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Time Complexity of Carry Look Ahead Adder & Introduction To MUX
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Multiplexer Problem Solving
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CONCEPT OF DEMUX, DECODER & ENCODER
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Encoder-Decoder Notes
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Implementation of ROM usind Decoder and Expansion of MUX
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Combinational Circuit Assignment
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Combinational Circuit Assignment Solution
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Comparator CKT
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Comparator Circuit & Expansion of Decoder
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Test 1: CMB
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Test 2: CMB
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Introduction To Sequential Circuits
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SR FLIP FLOP
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JK Flip Flop
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Concept of D, T Flip Flop & Flip Flop Conversion
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Design of Synchronous Counter
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Sequential Circuit Assignment
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Sequential Circuit Assignment Solution
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Design of Asynchronous Counter
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Test on cominational & sequential Circuits
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Overview of Computer Architecture & Organization
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Components of Computer System | Von-Neumann Architecture | Programming Lecture 2
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Addressing Modes
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Addressing Modes
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Various Special Purpose Registers and Fetch Cycle
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Processor Organization and Architecture
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Control Unit Design Part 1
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Control Unit Design Part 2
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Instruction Pipelining Part 1
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Recording - Instruction Pipelining Part 2
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Removing Name (anti and output) Dependency using Register Renaming
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Solving RAW Data Hazard: Forwarding or By Passing
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Load Delay Slot and Instruction Scheduling
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Control Hazard Solution: Filling Branch Delay Slots
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1 bit branch predictor
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2 bit Branch Predictor
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Data Representation and Arithmetic Algorithms
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Recording - Subtraction Using 2's and 1's complement
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Recording - signed and unsigned number representation
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Recording - Floating Point Representation
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Recording - IEEE 754 number system
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Encoding System : Grey,BCD,Excess-3, ASCII codes
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NUMBER SYSTEM MAIN POINTS
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Memory Organization
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BY SHRIKANT SIR
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Memory Organization Part: 1
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Memory organization: Part 2
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PROBLEM SOLVING
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BY NIRAJ SIR
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Recording - Introduction To Cache Memory and Mapping Techniques
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Cache Part 1
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Cache Part 2
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Cache Part 3
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Cache Part 4
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Cache and Mapping Techniques Complete notes
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Global and Local Miss and Hit Rate
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Average Access Time Calculation : Part 1
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Average Access Time Calculation : Part 2
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Tavg Calculation Using Miss Penalty
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CPU Time Calculation
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Cache Policies: Part 1
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Cache Policies: Part 2 | Cache Replacement Algorithms
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Implementation of LRU
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Inclusive and Exclusive Cache
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Write Policies
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Cache Coherence & write policies
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Unified vs Split Cache _ Blocking vs Non Blocking Cache
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Types of Misses and Reducing Miss rate : Part 1
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I/O Organization
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Recording - Disk Structure and Numericals
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Magnetic Disk in Computer Architecture
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INTERRUPTS
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DMA
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Recording - INTERRUPT HANDLING
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Recording - Numericals
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Launch your Graphy